Voltage source inverter (VSI)

Overview
This document describes GridLAB-D implementation of voltage source inverter (VSI). VSI is implemented in a similar way as the diesel_dg. A Norton current source behind an admittance is used to represent the VSI. A Thevenin voltage source is then converted from the Norton source for the calculation of voltage source e_source magnitude and angle.

Two VSI modes are implemented: isochronous mode and droop mode.
 * The isochronous mode VSI
 * The isochronous mode VSI is usually placed at the SWING bus, with constant voltage source e_source angle. In this way, frequency of the VSI is assumed to be constant. In order to keep the bus voltage at VSI at a reasonable range, the measured VSI terminal voltage is compared to the nominal voltage, and a PI voltage controller is used to obtain the magnitude of e_source.


 * The slew rate limits for both real and reactive power have been implemented in the isochronous mode VSI. An export function in the inverter object is defined to update the VSI current injection IGenerated to the grid in each power flow iteration.
 * In each power flow iteration in solver_nr.cpp, if the VSI bus has the export function (current_injection_update) mapped, the export function will be executed. In this function, when the ramp rate check for real power is enabled, the real power output change from the last time step (either delta-mode time step, or steady-state mode time step) is calculated, and compared with the ramp rate limit. The ramp rate up and down limits have been defined in glm file, or given as default values. If the change exceeds the limit, the real power value is updated based on the value in the last time step, and the ramp rate limit. The updated real power output will also change the VSI current injection IGenerated, as well as the e_source value correspondingly.


 * In addition, in the delta-mode inter_deltaupdate function, real and reactive power outputs changes are compared to predefined/default real and reactive slew rate respectively, when real and reactive power slew rate check is enabled.


 * To be noticed, both real and reactive power slew rate check cannot be enabled in the same time with more than one VSI in the feeder, or power flow converge problem will appear.


 * The droop mode VSI
 * The droop mode VSI includes two droops: f/p and v/q. Based on measured (delayed) power outputs from VSI, the corresponding frequency (and therefore e_source angle) and e_source magnitude are updated.


 * The slew rate limits for both real and reactive power have been implemented in the droop mode VSI. Similar to the implementation for the isochronous mode VSI, the real power slew rate check is executed in each power flow iteration. In addition, the real and reactive power changes are examined in each delta mode time step in inter_deltaupdate function.


 * To be noticed, both real and reactive power slew rate check cannot be enabled in the same time with more than one VSI in the feeder, or power flow converge problem will appear.

Battery is required to be attached to VSI with enough energy stored. Simulations of VSI can still be run without the attachment of battery, but battery is added if taking into account the reality. The battery is working through the inverter object, with the state-of-charge updated in the battery object, and power outputs calculated from the inverter object. Currently if there is no Battery attached to VSI, a warning will be given, and the VSI is assumed to be attached to an infinite power input.

Isochronous mode VSI object example
This inverter object is a VSI in isochronous mode. The VSI is implemented under the inverter type FOUR_QUADRANT. The droop mode VSI is chosen by selecting four_quadrant_control_mode as VOLTAGE_SOURCE, VSI_mode as VSI_ISOCHRONOUS (by default VSI_mode is VSI_ISOCHRONOUS for VSI objects), use_multipoint_efficiency as FALSE, generator_status as ONLINE. The dynamic_model_mode is always given as PI for VSI objects.

The isochronous mode VSI is placed on a SWINGbus. The power rating per phase given for this VSI is 1 MVA. At the first time step of the simulation, the real and reactive power outputs from the VSI are calculated based on power flow solutions, rather than based on the P_Out and Q_Out given. After entering into the delta mode, the e_source angle is kept constant, and magnitude is adjusted using a PI voltage controller, with the integrator gain ki_Vterminal given as 0.01, and the proportional gain kp_Vterminal given as 0.1. The default filter impedance of the VSI is given as 0.0025 + j0.06 p.u..

The real power slew rate is enabled in this example, with maximum ramp down rate defined as 25 MW/s, and maximum ramp up rate given as 30 MW/s.

Example of Isochronous mode VSI
module generators; object inverter { parent 150; name VSI; inverter_type FOUR_QUADRANT; use_multipoint_efficiency FALSE; four_quadrant_control_mode VOLTAGE_SOURCE; generator_status ONLINE; inverter_efficiency 1; enable_ramp_rates_real true; max_ramp_down_real 25.0 MW/s; max_ramp_up_real 30.0 MW/s; enable_ramp_rates_reactive false; max_ramp_down_reactive 100 MVAr/s; max_ramp_up_reactive 100 MVAr/s; rated_power 10000 kVA; // Per phase rating VSI_Rfilter 0.0025; VSI_Xfilter 0.06; P_Out 9000000; Q_Out 3000000; V_In 3000+0j; I_In 2000+0j; flags DELTAMODE; dynamic_model_mode PI; inverter_convergence_criterion 0.001; ki_Vterminal 0.01; kp_Vterminal 0.1; }

Droop mode VSI object example
This inverter object is a VSI in droop mode. The VSI is implemented under the inverter type FOUR_QUADRANT. The droop mode VSI is chosen by selecting four_quadrant_control_mode as VOLTAGE_SOURCE, VSI_mode as VSI_DROOP, use_multipoint_efficiency as FALSE, generator_status as ONLINE. The dynamic_model_mode is always given as PI for VSI objects.

The power rating per phase given for this VSI is 1000 kVA. Before entering the delta mode, the real and reactive power outputs from the VSI are equal to the given P_Out and Q_Out values, which are 1 MW and 1MVar respectively. After entering into the delta mode, the power outputs will be based on the droop curve parameters defined. The filter impedance of the VSI is given as 0.0025 + j0.06 p.u..

The reactive power slew rate is enabled in this example, with both maximum ramp down rate and maximum ramp up rate given as 20 MW/s or MVAr/s.

Example of Droop mode VSI
module generators; object inverter { parent 150; name VSI; inverter_type FOUR_QUADRANT; use_multipoint_efficiency FALSE; four_quadrant_control_mode VOLTAGE_SOURCE; generator_status ONLINE; inverter_efficiency 1; enable_ramp_rates_real false; max_ramp_down_real 15.0 MW/s; max_ramp_up_real 15.0 MW/s; enable_ramp_rates_reactive true; max_ramp_down_reactive 20 MVAr/s; max_ramp_up_reactive 20 MVAr/s; rated_power 10000 kVA; // Per phase rating P_Out 1000000; Q_Out 1000000; V_In 1000+0j; I_In 1000+0j; flags DELTAMODE; dynamic_model_mode PI; inverter_convergence_criterion 0.001; VSI_Rfilter 0.0025; VSI_Xfilter 0.06; // Droop curve parameters Tp_delay 0.01; R_fp 0.00000001; Tq_delay 0.01; R_vq 0.0000005; }

Properties
This table lists the properties related to VSI implementation. Some parameters used by other types of inverters can be found in the inverter wiki page.

Case 1
In IEEE 123-bus feeder, one VSI in isochronous mode is placed at swing bus, and one VSI in droop mode is placed at another bus.

Part of the feeder is disconnected at 12:00:05.0001 PST. As seem from the real power outputs result in the figure below, since the frequency is kept to 60 HZ by the isochronous VSI, the real power output of the droop VSI is kept the same. The real power outputs from isochronous VSI reduces after disconnection of the feeder.

At 12:00:8.001 PST, the part of the feeder is reconnected. Outputs from the two VSIs return to initial values.



Case 2
In IEEE 123-bus feeder, one VSI in droop mode is placed at swing bus, and one VSI in droop mode is placed at another bus.

Part of the feeder is disconnected at 12:00:05.0001 PST. As seem from the real power outputs result in the figure below, real power outputs decrease at two VSIs. With the reduction of real power outputs, frequency of the VSI increases, as seen from the second figure below.



To run these cases, please find in the autotest in GridLAB-D generator module.