Spec:sync ctrl

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= Overview = The synchronization control capability in GridLAB-D is implemented to adjust the frequency and voltage differences via a controlled generation unit for the synchronization check capability of the sync_ctrl object, which performs paralleling for two independent power grids. The controlled generation unit is either a diesel generator or a grid-forming inverter. This could be used to help with paralleling two separate power systems, or reconnecting a microgrid to the bulk power system. In the simulation, the frequency and voltage magnitude differences are checked. When conditions are satisfied, the sync_check object will be armed by the sync_ctrl object. Otherwise, the generation unit is controlled for achieving these conditions.

= Inputs and outputs of related objects = The inputs and outputs of the switch, sync_check, sync_ctrl, and controlled generation unit (i.e., diesel_dg/inverter_dyn) objects are shown in the following figure, together with the dataflow.



= Published properties =

The published public and hidden properties are listed in Table 1 and 2, respectively, together with the mapped member variables. The sync_ctrl object inherits all standard Object_(directive) values as well. The definitions of other member variables, which are not published as properties, are presented in Table 3 of the next section "Member variable definitions".

Sample
One sample sync_ctrl object defined in the glm file is show as follows.

object sync_ctrl {    name sct_f01f02; flags DELTAMODE; armed false; //starting as disarmed sync_check_object grid_resyncer; //the sync_check object linked to this sync_ctrl object controlled_generation_unit Diesel_1; //the controlled genration unit can be either a DG or INV // controlled_generation_unit Inverter_1; //About the modes: 1) 'Mode A' is the controlling mode, in which the PI controllers of the sync_ctrl object send commands to the controlled generation unit. 2) In 'Mode B', the sync_ctrl object monitors the voltage magnitude and frequency differences, but its PI controllers are not used and there is no signal sent to the controlled generation unit. //Details of the modes and control flow are shown in this figure: http://gridlab-d.shoutwiki.com/wiki/File:Sync_ctrl_flowchart.png controlling_period 2; //the user-defined period when both metrics are satisfied and this sync_ctrl object works in mode A     monitoring_period 15; //the user-defined period when this sync_ctrl object keeps on monitoring in mode B, if both metrics are not violated and the switch object is not closed frequency_tolerance_ub_hz -0.7; //the control target is set as (frequency_tolerance_ub_hz + frequency_tolerance_lb_hz)/2 frequency_tolerance_lb_hz -0.1; //the values of frequency_tolerance_ub_hz and frequency_tolerance_lb_hz can be swapped freely, the results will be the same pi_freq_kp -2; //the user-defined proportional gain constant of the PI controller for adjusting the frequency setting pi_freq_ki -0.2; //the user-defined integral gain constant of the PI controller for adjusting the frequency setting //Note that the control target of the voltage magnitude difference is set as 0, regardless of the setting of voltage_magnitude_tolerance_pu voltage_magnitude_tolerance_pu 0.02; //the user-specified tolerance in per unit for the difference in voltage magnitudes for checking the voltage metric pi_volt_mag_kp -2; //the user-defined proportional gain constant of the PI controller for adjusting the voltage magnitude setting pi_volt_mag_ki -0.2; //the user-defined integral gain constant of the PI controller for adjusting the voltage magnitude setting sct_volt_cv_arm_flag true; //if set as false, the PI controller for voltage magnitude difference control will be disabled pi_volt_mag_ub_pu 1.65; //the upper bound of the output signal (e.g., vset) of the voltage controller pi_volt_mag_lb_pu 0.35; //the lower bound of the output signal (e.g., vset) of the voltage controller sct_freq_cv_arm_flag true; //if set as false, the PI controller for frequency difference control will be disabled pi_freq_ub_pu 1.0; //the upper bound of the output signal (e.g., Pset) of the frequency controller pi_freq_lb_pu 0; //the lower bound of the output signal (e.g., Pset) of the frequency controller }

Hidden properties
= Member variable definitions =

Some member variables, which are not published as properties, of the sync_ctrl class are listed in Table 3. For other member variables, which are not included in Table 3, please look at the source code and related comments.

= Methodology of quasi-steady state time series (QSTS)=

No explicit functions are performed in the QSTS mode. The sync_ctrl will perform all behavior in deltamode, under the assumption the call to deltamode was triggered by either the device arming the sync_ctrl object, or by something elsewhere in the system making the adjustments for synchronization to occur.

= Methodology of deltamode =

Flowchart
The flowchart for sync_ctrl in deltamode is shown as follows. In mode A, the sync_ctrl adjusts the voltage and frequency settings of the controlled generation unit actively. In mode B, it monitors the voltage magnitudes and frequency and counts a timer, determining to switch to mode A if needed.



Pseudocode of modes
The pseudocode of two functions that check the metrics in mode A and B, respectively, are shown as follows.

Mode A
algorithm sync_ctrl_metrics_check_mode_A is inputs: swt_fm_nd_freq_hz, swt_to_nd_freq_hz, swt_fm_nd_volt_ph_a_v, swt_to_nd_volt_ph_a_v, swt_fm_nd_volt_ph_b_v, swt_to_nd_volt_ph_b_v, swt_fm_nd_volt_ph_c_v, swt_to_nd_volt_ph_c_v, norm_volt_v, sct_freq_tol_ub_hz, sct_freq_tol_lb_hz, sct_volt_mag_tol_pu output: Flag metrics_check_flag such that metrics_check_flag is true if both metrics are satisfied for an enough period, false otherwise //== Frequency freq_diff_hz ← abs(swt_fm_nd_freq_hz - swt_to_nd_freq_hz) //== Voltage (Phase A) volt_mag_diff_ph_a_v ← abs(abs(swt_fm_nd_volt_ph_a_v) - abs(swt_to_nd_volt_ph_a_v)) volt_mag_diff_ph_a_pu ← volt_mag_diff_ph_a_v / norm_volt_v //== Voltage (Phase B) volt_mag_diff_ph_b_v ← abs(abs(swt_fm_nd_volt_ph_b_v) - abs(swt_to_nd_volt_ph_b_v)) volt_mag_diff_ph_b_pu ← volt_mag_diff_ph_b_v / norm_volt_v //== Voltage (Phase C) volt_mag_diff_ph_c_v ← abs(abs(swt_fm_nd_volt_ph_c_v) - abs(swt_to_nd_volt_ph_c_v)) volt_mag_diff_ph_c_pu ← volt_mag_diff_ph_c_v / norm_volt_v //== Check if (freq_diff_hz <= sct_freq_tol_ub_hz) and (freq_diff_hz >= sct_freq_tol_lb_hz) and (volt_mag_diff_ph_a_pu <= sct_volt_mag_tol_pu) and (volt_mag_diff_ph_b_pu <= sct_volt_mag_tol_pu) and (volt_mag_diff_ph_c_pu <= sct_volt_mag_tol_pu) do timer_mode_A_sec ← timer_mode_A_sec + dt_dm_sec //dt_dm_sec is a local variable that indicates the current deltamode timestep else do timer_mode_A_sec ← 0 if (timer_mode_A_sec >= pp_t_ctrl_sec) do metrics_check_flag ← true else do metrics_check_flag ← false return metrics_check_flag

Mode B
algorithm sync_ctrl_metrics_check_mode_B is inputs: swt_fm_nd_freq_hz, swt_to_nd_freq_hz, swt_fm_nd_volt_ph_a_v, swt_to_nd_volt_ph_a_v, swt_fm_nd_volt_ph_b_v, swt_to_nd_volt_ph_b_v, swt_fm_nd_volt_ph_c_v, swt_to_nd_volt_ph_c_v, norm_volt_v, sct_freq_tol_ub_hz, sct_freq_tol_lb_hz, sct_volt_mag_tol_pu output: Flag metrics_check_flag such that metrics_check_flag is true if both metrics are satisfied within this timestep, false otherwise //== Frequency freq_diff_hz ← abs(swt_fm_nd_freq_hz - swt_to_nd_freq_hz) //== Voltage (Phase A) volt_mag_diff_ph_a_v ← abs(abs(swt_fm_nd_volt_ph_a_v) - abs(swt_to_nd_volt_ph_a_v)) volt_mag_diff_ph_a_pu ← volt_mag_diff_ph_a_v / norm_volt_v //== Voltage (Phase B) volt_mag_diff_ph_b_v ← abs(abs(swt_fm_nd_volt_ph_b_v) - abs(swt_to_nd_volt_ph_b_v)) volt_mag_diff_ph_b_pu ← volt_mag_diff_ph_b_v / norm_volt_v //== Voltage (Phase C) volt_mag_diff_ph_c_v ← abs(abs(swt_fm_nd_volt_ph_c_v) - abs(swt_to_nd_volt_ph_c_v)) volt_mag_diff_ph_c_pu ← volt_mag_diff_ph_c_v / norm_volt_v //== Check if (freq_diff_hz <= sct_freq_tol_ub_hz) and (freq_diff_hz >= sct_freq_tol_lb_hz) and (volt_mag_diff_ph_a_pu <= sct_volt_mag_tol_pu) and (volt_mag_diff_ph_b_pu <= sct_volt_mag_tol_pu) and (volt_mag_diff_ph_c_pu <= sct_volt_mag_tol_pu) do metrics_check_flag ← true else do metrics_check_flag ← false return metrics_check_flag

PI Controllers
There are two PI controllers that adjust the respective voltage magnitude and frequency settings of the controlled generation unit. The desired set-point of that frequency PI controller is calculated by (frequency_tolerance_ub_Hz + frequency_tolerance_lb_Hz)/2. The other PI controller that adjusts the voltage magnitude difference uses the set-point of 0, which cannot be modified by the user at this stage.

= Validation = This subsection provides an outline on how the sync_ctrl object will be tested to ensure its functionality. The current plan is to use two 4-node test systems interconnected through a switch object, which is the parent of a sync_check object. The switch object is initially open and disarmed. The sync_check object is specified as a property of the sync_ctrl object, which is initially disarmed as well.

The frequency and voltage values measured at the 'from' and 'to' nodes of the switch object are initialized in different values. The deviations must be larger than the user defined tolerances. The frequency and voltage of the 'from'/'to' node of the parent switch object of the sync_check object are manipulated by the sync_ctrl object via the controlled generation unit (i.e., a diesel generator or a grid-forming inverter) towards the measurements of the 'from'/'to' node. The controlled generation unit is specified as a property of the sync_ctrl object. It is physically in the same island with the 'from'/'to' node. Once the deviations are both within the tolerance longer than the user defined period, the sync_ctrl object transits from 'Mode A' to 'Mode B' and sends an 'armed' command to the sync_check object. This sample use case will be included in the autotest for the sync_ctrl object.

= See also =
 * Requirements of sync_ctrl
 * Implementation of sync_ctrl
 * Implementation of sync_check