Contents
- 1 Overview
- 2 Grid-Forming Inverter
- 3 Grid-Following Inverter
- 4 Current Source Representation of Grid-Following Inverter
- 5 Grid-Forming with Updated DC Bus Model
- 6 References
- 7 See also
Overview
These represent the specifications and some examples for the inverter_dyn object, which is to represent grid-forming and grid-following inverters.
Grid-Forming Inverter
Equivalent Circuit of a Grid-Forming Inverter and Its Interface to the Network
The equivalent circuits of three-phased and single-phased grid-forming inverters are shown in Figure 1 (a) and (b). The grid-forming controller can be a CERTS droop controller or isochronous controller^{[1]}. When implemented in GridLAB-D, these voltage sources behind coupling reactance are converted to the Norton equivalent circuits for power flow calculation. The following assumptions are made when implementing the grid-forming inverters:
- When the inverter is three-phased, the internal voltages should be three-phase balanced.
- The dynamics of the dc bus voltage of inverters are not considered. The dc bus voltage is assumed to be constant during any load changes. In future work the dynamics of the dc side such as the PV panels, energy storage, and dc capacitors will be studied. The internal voltage E will be decided by both the Q-V droop control and the dc bus voltage.
CERTS Droop Control
Figure 2 shows the Q-V droop control, Figure 3 shows the P-f droop control and overload mitigation control. When [math]m_q[/math] and [math]m_p[/math] are set zero, the CERTS droop control becomes isochronous control.
If the inverter is three-phased, the active power, reactive power, and voltage magnitude can be calculated according to (1) to (3). The phase angles of the internal three-phase voltages can be obtained from (4) to (6), where [math]\delta_{0i}[/math] ([math]i=a,b,c[/math]) is the initial phase angle obtained from power flow calculation. It should be noted that the internal voltages are always three-phase balanced.
[math]\displaystyle{}P_{INV}=\frac{1}{1+T_{s}}\frac{\left(P_a+P_b+P_c\right)}{S_B}[/math] | (1) |
[math]\displaystyle{}Q_{INV}=\frac{1}{1+T_s}\frac{\left(Q_a+Q_b+Q_c\right)}{S_B}[/math] | (2) |
[math]\displaystyle{}V_{INV}=\frac{1}{3\left(1+T_s\right)}\frac{\left(V_{ga}+V_{gb}+V_{gc}\right)}{V_B}[/math] | (3) |
[math]\displaystyle{}\delta_a=\delta{}+\delta_{0a}[/math] | (4) |
[math]\displaystyle{}\delta_b=\delta{}+\delta_{0b}[/math] | (5) |
[math]\displaystyle{}\delta_c=\delta{}+\delta_{0c}[/math] | (6) |
If the inverter is single-phased, the active power, reactive power, and voltage magnitude can be calculated according to (7) to (9).
[math]\displaystyle{}P_{INV}=\frac{\frac{P_i}{1+T_s}}{S_B}[/math] | (7) |
[math]\displaystyle{}Q_{INV}=\frac{\frac{Q_i}{1+T_s}}{S_B}[/math] | (8) |
[math]\displaystyle{}V_{INV}=\frac{\frac{V_{gi}}{1+T_s}}{S_B}[/math] | (9) |
Transition between Quasi-Steady State Time Series Simulation and Delta Mode Simulation
Transition from QSTS to delta mode
- Calculate present output power/current at the terminals.
- Adjust current for any Norton-equivalence issues
- Update internal voltage by using terminal voltages and current flows
- Populate appropriate “final value” state variables from the terminal and internal voltages (e.g., dq transitions)
- Back-populate any intermediate state variables (reference angle, current frequency, etc.)
- No iterations should be required, since it should start at a “last know good state”
Transition from delta mode to QSTS
- No updates on the transition, but updates to maintain voltage and/or power output (power may be tied to voltage) should be formulated. This may be as simple as updating the internal voltage source, so long as any inverter limits are not exceeded.
Initialization
- Start power flow iterations with connected bus as SWING bus – let powerflow stabilize a few iterations with this “infinite source”
- While under SWING conditions, use the terminal voltage and computed power output to populate state variables with final values
- While under SWING conditions, back-calculate any intermediate states (reference angle, current frequency, etc.)
- While under SWING conditions, update on each powerflow solution, potentially through a direct call.
- Once powerflow stabilizes, release the SWING constraints and convert the bus to a normal PQ
- After SWING release, iterate through predictor/corrector differential equations with the powerflow until things stabilize (or limit reached).
- If starting in QSTS mode, the “deltamode to QSTS start” transition steps probably need to occur.
Definition of Parameters
[math]\displaystyle{}S_B[/math] | The rated capacity of inverter. If the inverter is three-phased, [math]S_B[/math] refers to the summation of rated power of three phases. If the inverter is single-phased, [math]S_B[/math] refers to the rated power of one phase. |
[math]\displaystyle{}V_B[/math] | The rated line to ground RMS voltage of an inverter. |
[math]\displaystyle{}X_L[/math] | The coupling reactance. The per unit value of [math]X_L[/math] usually belongs to 0.05 pu to 0.2 pu. |
[math]\displaystyle{}\delta_i[/math] ([math]i=a,b,c[/math]) | The phase angle of internal voltage for each phase. The phase angle is obtained from the P-f droop control. |
[math]\displaystyle{}\delta_{0i}[/math] ([math]i=a,b,c[/math]) | The initial values of phase angle of internal voltage for each phase. |
[math]\displaystyle{}I_{0i}[/math] ([math]i=a,b,c[/math]) | The magnitude of current that the inverter injects to the grid. |
[math]\displaystyle{}\psi_{0i}[/math] ([math]i=a,b,c[/math]) | The phase angle of current that hte inverter injects to the grid. |
[math]\displaystyle{}P_{INV}[/math] | The real power injected by the inverter to the grid. [math]P_{INV}[/math] is per-unit value, which base quantity is the NAMEPLATE rated capacity of inverter, [math]S_B[/math]. |
[math]\displaystyle{}Q_{INV}[/math] | The reactive power injected by the inverter to the grid. [math]Q_{INV}[/math] is per-unit value, which base quantity is the NAMEPLATE rated capacity of inverter, [math]S_B[/math]. |
[math]\displaystyle{}V_{INV}[/math] | The output voltage of the inverter. [math]V_{INV}[/math] is per-unit value, which base quantity is the NAMEPLATE rated voltage of inverter, [math]V_B[/math]. |
[math]\displaystyle{}E[/math] | The internal voltage of inverter. [math]E[/math] is per-unit value, which base quantity is the NAMEPLATE rated voltage of inverter, [math]V_B[/math]. |
[math]\displaystyle{}E_{0i}[/math] ([math]i=a,b,c[/math]) | The initial value of the magnitude of the internal voltage, which base quantity is the NAMEPLATE rated voltage of inverter, [math]V_B[/math]. |
[math]\displaystyle{}E_{max}[/math] | The upper limit of the internal voltage. |
[math]\displaystyle{}E_{min}[/math] | The lower limit of the internal voltage. |
[math]\displaystyle{}\omega{}[/math] | The output angular frequency of inverter, which unit is rad/s. |
[math]\displaystyle{}T_s[/math] | The time constant of low-pass filter. |
[math]\displaystyle{}m_q[/math] | The Q-V droop coefficient. The slope is usually set as 0.05pu. |
[math]\displaystyle{}V_{set}[/math] | The voltage set point. [math]V_{set}[/math] is usually set as 1 pu. |
[math]\displaystyle{}k_{pv}[/math] | The proportional gain of voltage control loop. [math]k_{pv}[/math] is usually set as 0 pu. |
[math]\displaystyle{}k_{iv}[/math] | The integral gain of voltage control loop. [math]k_{iv}[/math] is usually set as 5.86 pu/s. |
[math]\displaystyle{}m_p[/math] | The P-f droop coefficient. The slope is usually set as 3.77 rad/s, which means the frequency drops 1% as the real power spans from 0 pu to 1 pu. |
[math]\displaystyle{}k_{ppmax}[/math] | The proportional gain for [math]P_{max}[/math] and [math]P_{min}[/math] controller. [math]k_{ppmax}[/math] is usually set as 3 rad/s. |
[math]\displaystyle{}k_{ipmax}[/math] | The integral gain of [math]P_{max}[/math] and [math]P_{min}[/math] controller. [math]k_{ipmax}[/math] is usually set as 30 rad/s2. It should be noted that the anti-wind-up integrator should be used for [math]P_{max}[/math] and [math]P_{min}[/math] controller. For [math]P_{max}[/math] controller, there is a 0 upper limiter. For [math]P_{min}[/math] controller, there is a 0 lower limiter. |
[math]\displaystyle{}P_{set}[/math] | The power set point of the inverter. If we assume the inverter is a normal inverter without energy storage, the [math]P_{set}[/math] should be between 0 pu to 1 pu. If we assume the inverter is an energy storage, the [math]P_{set}[/math] should be between -1 pu to 1 pu. |
[math]\displaystyle{}P_{max}[/math] | The maximum power limit that the inverter is allowed to output. |
[math]\displaystyle{}P_{min}[/math] | The minimum power limit that the inverter is allowed to output. |
[math]\displaystyle{}\omega_{0}[/math] | The rated grid angular frequency, usually 376.99 rad/s. |
[math]V_{set}[/math] [pu] | [math]m_q[/math] [pu] | [math]k_{pv}[/math] [pu] | [math]k_{iv}[/math] [pu/s] |
---|---|---|---|
1.0 | 0.05 | 0 | 5.86 |
[math]m_p[/math] [rad/s] | [math]k_{ppmax}[/math] [rad/s] | [math]k_{ipmax}[/math] [rad/s] | [math]P_{set}[/math] [pu] | [math]P_{max}[/math] [pu] | [math]P_{min}[/math] [pu] |
---|---|---|---|---|---|
3.77 | 3.0 | 30.0 | Normal inverter: 1, Energy storage: -1 to 1 | 1.0 | Nomral inverter: 0, Energy storage: -1 |
GridLAB-D Model Example
This is an example that effectively has an infinite DC bus
object inverter_dyn { name simple_DC_model_grid_forming_inverter; parent grid_form_simple_DC; rated_power 100 kW; // full rated power (not per-phase) flags DELTAMODE; control_mode GRID_FORMING; //Criterion to exit deltamode frequency_convergence_criterion 1e-9; //Convergence criterion (rad/s) voltage_convergence_criterion 1e-3; //Convergence criterion (V) //Pref and Qref only initialize non-SWING-connected //(if SWING, powerflow initializes) Pref 1.0 kW; //Real power reference for initialization Qref 200 W; //Reactive power reference for initialization E_max 1.2; //Maximum internal voltage output Rfilter 0.005; //Real portion of inverter filter (pu) Xfilter 0.05; //Reactive portion of inverter filter (pu) mp 3.77; //P-f droop in rad/s/pu - 3.77 represents 1% droop kppmax 3; //Proportional gain for P_Max controller kipmax 60; //Integral gain fo P_Max controller Pmax 1.5; //Maximum power controller can deliver (pu) Pmin 0; //Minimum power controller can deliver (pu) mq 0.05; //Q-V droop - 0.05 represents 5% droop }
Grid-Following Inverter
For a practical grid-following inverter, it also uses a voltage source converter as the grid-forming inverter uses, the only difference is that the control strategy makes the voltage source converter behave as a current source.
Equivalent Circuit of a Detailed Grid-Following Inverter
Figure 4 (a) and (b) show the equivalent circuits of three-phased and single-phased grid-following inverters respectively. It can be seen that the main circuit of a grid-following inverter is fundamentally either a three-phased or single-phased voltage source. This is because the inverter itself is a voltage source converter. The grid-following controller makes the inverter behaves as a current source. When implemented in GridLAB-D, these voltage sources behind coupling reactance are converted to the Norton equivalent circuits for power flow calculation. The following assumptions are made when implementing grid-following inverter in GridLAB-D:
- For simplicity, the grid-following controller is modeled per phase. This means each phase has its own PLL and current control loop.
- We assume each phase injects the same amount of P and Q into the grid.
- For a split phase connection, we assume the inverter is connected between two phases, Phase 1 and Phase 2.
Detailed Grid-Following Controller
The grid-following controller includes two key components, the Phase-Lock-Loop (PLL) and the Current Control Loop. The PLL is used to estimate the phase angle [math]\angle{\delta_g}[/math] of the grid side voltage. With [math]\angle{\delta_g}[/math] obtained, the controller can inject the specified P and Q into the grid. The Current Control Loop quickly regulates the current [math]I_g\angle{\psi_g}[/math] injected into the grid, so the grid-following inverter can behave as a current source.
For simplicity, the grid-following controller is modeled per phase. This means each phase has its own PLL and current control loop. We assume each phase injects the same amount of P into the grid.
Figure 5 shows the control block of a PLL. For each phase, the grid side voltage [math]U_{gi}\angle{\delta_{gi}}[/math] ([math]i=a,b,c[/math]) is transformed from [math]xy[/math] frame into [math]dq[/math] frame. The controllers tries to control [math]u_{gqi}=0[/math]. The output [math]\angle{\delta_{PLLi}}[/math] should equal to the phase angle of the grid side voltage [math]\angle{\delta_{gi}}\left(\angle{\delta_{PLLi}}=\angle{\delta_{gi}}\right)[/math], and [math]f_{PLLi}[/math] should equal to the system frequency.
Figure 6 and equations (10) to (13) show how the grid side voltage [math]U_{gi}\angle{\delta_{gi}}[/math] and current [math]I_{gi}\angle{\delta_{gi}}[/math] ([math]i=a,b,c[/math]) are transformed from [math]xy[/math] frame into [math]dq[/math] frame individually. In steady state [math]u_{gqi}=0[/math]. It should be noted that in equation (13) there is a negative sign in current calculation. This is because the phase angle of voltage is assumed to be lead the phase angle of current, so positive direction of [math]iq[/math] should be negative.
[math]\displaystyle{}u_{gdi}=\frac{\left[\textrm{Re}\left(U_{gi}\angle{\delta_{gi}}\right)\cos{\delta_{PLLi}}+\textrm{Im}\left(U_{gi}\angle{\delta_{gi}}\right)\sin{\delta_{PLLi}}\right]}{U_B}[/math] | (10) |
[math]\displaystyle{}u_{gqi}=\frac{-\left[\textrm{Re}\left(U_{gi}\angle{\delta_{gi}}\right)\sin{\delta_{PLLi}}+\textrm{Im}\left(U_{gi}\angle{\delta_{gi}}\right)\cos{\delta_{PLLi}}\right]}{U_B}[/math] | (11) |
[math]\displaystyle{}i_{gdi}=\frac{\left[\textrm{Re}\left(I_{gi}\angle{\psi_{gi}}\right)\cos{\delta_{PLLi}}+\textrm{Im}\left(I_{gi}\angle{\psi_{gi}}\right)\sin{\delta_{PLLi}}\right]}{I_B}[/math] | (12) |
[math]\displaystyle{}i_{gqi}=\frac{-\left[\textrm{Re}\left(I_{gi}\angle{\psi_{gi}}\right)\sin{\delta_{PLLi}}+\textrm{Im}\left(I_{gi}\angle{\psi_{gi}}\right)\cos{\delta_{PLLi}}\right]}{I_B}[/math] | (13) |
It should be noted that according to (11) we can also have (14). (14) helps to explain how the PLL controller works. In steady state, [math]\angle{\delta_{PLLi}}=\angle{\delta_{qi}}[/math].
[math]\displaystyle{}u_{gqi}=\sin{\delta_{gi}-\delta{PLLi}}\frac{U_{gi}}{U_B}[/math] | (14) |
Figure 7 shows the current control loop. The outputs of the current control loop are the internal voltages [math]e_{di}[/math] and [math]e_{qi}[/math] for each phase.
Equation (15) and (16) show that how the current references [math]i_{gdi\_ref}[/math] and [math]i_{gqi\_ref}[/math] ([math]i=a,b,c[/math]) are obtained according to the references [math]P_{refi}[/math] and [math]Q_{refi}[/math]. [math]P_{refi}[/math] and [math]Q_{refi}[/math] are per unit values for each phase.
[math]\displaystyle{}i_{gdi\_ref}=\frac{P_{refi}}{u_{gdi}}[/math] | (15) |
[math]\displaystyle{}i_{gqi\_ref}=\frac{-Q_{refi}}{u_{gdi}}[/math] | (16) |
Figure 8, Equation (17) and (18) show how the internal voltages [math]e_{di}[/math] and [math]e_{qi}[/math] are transformed from [math]dq[/math] frame back into [math]xy[/math] frame. With [math]E_i\angle{\delta_i}[/math] obtained, power flow analysis can be conducted. [math]E_i\angle{\delta_i}[/math] should be converted to their Norton equivalence when conducting power flow analysis.
[math]\displaystyle{}\textrm{Re}\left(E_i\angle{\delta_i}\right)=\left(e_{di}\cos{\delta_{PLLi}}-e_{qi}\sin{\delta_{PLLi}}\right)U_B[/math] | (17) |
[math]\displaystyle{}\textrm{Im}\left(E_i\angle{\delta_i}\right)=\left(e_{di}\sin{\delta_{PLLi}}+e_{qi}\cos{\delta_{PLLi}}\right)U_B[/math] | (18) |
Transition between QSTS and Delta Mode Simulation
Transition from QSSTS to deltamode
- Calculate present output power/current at the terminals
- Adjust the terminal currents, if necessary, for Norton-equivalent impedance/admittance
- Compute the internal voltage values
- Force populate state variables with final values (PLL angle, PLL frequency)
- Back-calculate any intermediate variables (frequency deviation, angle difference)
- Should be starting from a “known good” state, so just proceed with differential equations.
Transition from deltamode to QSTS
- Theoretically, nothing should need to be done (just keep using same terminal currents) – system should be in a “known good state”
Initialization
deltamode start
- Determine terminal currents based on ([math]P_{ref}[/math],[math]Q_{ref}[/math]) and current terminal voltages
- Adjust terminal currents, if necessary, for Norton-equivalent impedance/admittance
- Use power/current and terminal voltage values to populate internal voltage source values
- Compute [math]dq[/math] equivalents of voltages and currents
- Force-populate the state variables with the final values
- Back-calculate any intermediate states (frequency deviation, angle difference) from the "final states" obtained from the powerflow.
- Update on each powerflow solution, potentially through a direct update call (to cut down on iterations).
QSTS start
- Determine terminal currents based on ([math]P_{ref}[/math],[math]Q_{ref}[/math]) and current terminal voltages
- Adjust terminal currents, if necessary, for Norton-equivalent impedance/admittance
- Update on each powerflow solution, potentially through a direct update call (to cut down iterations)
External Controls
The external controls include frequency-watt control and volt-var control. These functions can be enabled or disabled.
Figure 9 shows the control block of the frequency-watt control. It measures the variation of frequency and changes the reference of output power [math]P[/math]. The frequency is measured by a PLL.
Figure 10 shows the control block of the Volt-Var control. It measures the variation of voltage and changes the reference of reactive power [math]Q[/math].
Definition of Parameters
[math]\displaystyle{}k_{pPLL}[/math] | The proportional gain of the PLL control block. |
[math]\displaystyle{}k_{iPLL}[/math] | The integral gain of the PLL control block |
[math]\displaystyle{}k_{pc}[/math] | The proportional gain of the current control loop |
[math]\displaystyle{}k_{ic}[/math] | The integral gain of the current control loop |
[math]\displaystyle{}i_{gi}\left(i=a,b,c\right)[/math] | the magnitude of the grid side current that the inverter injects into the grid |
[math]\displaystyle{}\psi_{gi}\left(i=a,b,c\right)[/math] | the phase angle of the grid side current that the inverter injects into the grid |
[math]\displaystyle{}U_{gi}\left(i=a,b,c\right)[/math] | The magnitude of the grid side voltage |
[math]\displaystyle{}\delta_{gi}\left(i=a,b,c\right)[/math] | The phase angle of the grid side voltage |
[math]\displaystyle{}E_i\left(i=a,b,c\right)[/math] | The magnitude of the internal voltage |
[math]\displaystyle{}\delta_i\left(i=a,b,c\right)[/math] | The phase angle of the internal voltage |
[math]\displaystyle{}\delta_{PLLi}\left(i=a,b,c\right)[/math] | The phase angle measured by the PLL. It should equals to [math]\delta_{gi}[/math] in steady state if the PLL works well. |
[math]\displaystyle{}f_{PLLi}\left(i=a,b,c\right)[/math] | The frequency of each phase measured by the PLL |
[math]\displaystyle{}u_{gdi},u_{gqi}\left(i=a,b,c\right)[/math] | The grid side voltage in [math]dq[/math] frame for each phase |
[math]\displaystyle{}i_{gdi},i_{gqi}\left(i=a,b,c\right)[/math] | The grid side current in [math]dq[/math] frame for each phase |
[math]\displaystyle{}i_{gdi\_ref},u_{gqi\_ref}\left(i=a,b,c\right)[/math] | The grid side current references for each phase |
[math]\displaystyle{}e_{di},e_{qi}\left(i=a,b,c\right)[/math] | The internal voltages of an inverter in [math]dq[/math] frame |
[math]\displaystyle{}P_{refi},Q_{refi}\left(i=a,b,c\right)[/math] | The references of P and Q specified by the user. [math]P_{refi}[/math] and [math]Q_{refi}[/math] should be per unit values. [math]Q_{refi}[/math] usually is zero, if the volt-var control is enabled, [math]Q_{refi}[/math] is decided by the volt-var control. If frequency-watt control is enabled, [math]P_{refi}[/math] is decided by the frequency-watt control. [math]P_{refi}[/math] usually belongs to 0 pu to 1 pu. [math]Q_{refi}[/math] usually belongs to -1 pu to 1 pu. |
[math]\displaystyle{}P_{max},P_{min}[/math] | The maximum and minimum active power of an inverter. |
[math]\displaystyle{}Q_{max},Q_{min}[/math] | The maximum and minimum reactive power of an inverter. |
[math]\displaystyle{}P_{ref0}\left(i=a,b,c\right)[/math] | The active power set point in frequency-watt control. It usually belongs to 0 pu to 1 pu. |
[math]\displaystyle{}U_{0i}\left(i=a,b,c\right)[/math] | The voltage set point for each phase in volt-var control. The value is usually 1 pu. |
[math]\displaystyle{}T_1[/math] | Time constant of the low pass filter, usually 0.01 s. |
[math]\displaystyle{}S_B[/math] | The rated capacity of inverter. If the inverter is three-phased, [math]S_B[/math] refers to the summation of rated power of three phases. If the inverter is single-phased, [math]S_B[/math] refers to the rated power of one phase. |
[math]\displaystyle{}U_B[/math] | The rated line to ground RMS voltage of an inverter. |
[math]\displaystyle{}X_L[/math] | The coupling reactance. The per unit value of [math]X_L[/math] usually belongs to 0.05 pu to 0.2 pu. |
[math]\displaystyle{}\omega_0[/math] | The rated grid angular frequency, usually 376.99 rad/s. |
[math]\displaystyle{}m_p[/math] | The P-f droop coefficient. The slope is usually set as 3.77 rad/s, which means the frequency drops 1% as the real power spans from 0 pu to 1 pu. |
[math]\displaystyle{}m_q[/math] | The Q-V droop coefficient. The slope is usually set as 0.05pu. |
GridLAB-D Model Example
object inverter_dyn { name Grid_Following_Inverter; rated_power 100 kW; // full rated power (not per-phase) flags DELTAMODE; control_mode GRID_FOLLOWING; //grid_following_mode BALANCED_POWER; // Inject balanced power grid_following_mode POSITIVE_SEQUENCE; // Inject balanced currents frequency_watt true; volt_var true; Pref_max 1; // Active power limit Pref 100 kW; // Active power reference Qref 0.0 kvar; // Reactive power reference Rfilter 0.005; // Real portion of inverter filter (pu) Xfilter 0.05; // Reactive portion of inverter filter (pu) kpPLL 50; // Proportional gain of PLL kiPLL 900; // Integral gain of PLL kpc 0.05; // proportional gain of current loop kic 5; // Integral gain of current loop F_current 0.5; // Feedforward term Rp 0.05; // Frequency-watt droop 5% Tpf 0.25; // Time constant for frequency-watt Tff 0.02; // Delay for frequency measurement in Frequency-watt Rq 0.05; // Volt-var droop 5% Tqf 0.2; // Time constant for volt-var Tvf 0.05; // Delay for voltage measurement in volt-var }
Current Source Representation of Grid-Following Inverter
In Grid-Following Inverter section above, the grid-following inverter is represented as a voltage source behind impedance, and the detailed inner current control loop is modeled. However, one drawback of this method is the low simulation efficiency. As the simulation step has to be set less than 2 ms, and sometimes there will be numerical stability issues. Therefore, in this section the grid-following inverter is modeled as a current source, and the detailed inner current control loop is ignored. Although the dynamic response of the current loop is ignored, the simulation efficiency can be improved.
Current Source Representation of Grid-Following
The voltage source representation (Figure 11) is changed to current source representation (Figure 12). It can be seen that the shunt admittance is ignored in the current source representation model.
Simplification of Grid-Following Controller
The detailed inner current loops are ignored. Instead, a first-order low-pass filter is used to represent the dynamic response of current loop. Figure 13 shows the standard modeling approach (detailed in the earlier grid-following description). Figure 14 shows the first-order low-pass filter approximation noted here. The PLL is still kept in the simplified model and is represented in Figure 15, which is identical to the earlier grid-following implementation mentioned.
GridLAB-D Example Model
The following is a current-source representation of the grid-following inverter:
object inverter_dyn { name Grid_Following_Inverter; rated_power 100 kW; // full rated power (not per-phase) flags DELTAMODE; control_mode GFL_CURRENT_SOURCE; //grid_following_mode BALANCED_POWER; // Inject balanced power grid_following_mode POSITIVE_SEQUENCE; // Inject balanced currents frequency_watt true; volt_var true; Pref_max 1; // Active power limit Pref 100 kW; // Active power reference Qref 0.0 kvar; // Reactive power reference Rfilter 0.005; // Real portion of inverter filter (pu) Xfilter 0.05; // Reactive portion of inverter filter (pu) kpPLL 50; // Proportional gain of PLL kiPLL 900; // Integral gain of PLL kpc 0.05; // proportional gain of current loop kic 5; // Integral gain of current loop F_current 0.5; // Feedforward term Rp 0.05; // Frequency-watt droop 5% Tpf 0.25; // Time constant for frequency-watt Tff 0.02; // Delay for frequency measurement in Frequency-watt Rq 0.05; // Volt-var droop 5% Tqf 0.2; // Time constant for volt-var Tvf 0.05; // Delay for voltage measurement in volt-var }
Grid-Forming with Updated DC Bus Model
Typically, the grid-forming inverter described earlier is assumed to have a stiff DC bus - dynamics do not affect it, and it is treated mostly as a limitation on the power available. The following sections outline the inverter-side-modeling of considering DC bus effects -- a complimentary section is available in the solar model for the photovoltaic (PV) side of the model.
PV Inverter Interface Modeling
The equivalences of the inverter at AC side and overall model are shown in Figure 16 and Figure 17, respectively.
At the AC side, the inverter behaves like a 3-Phase controlled voltage source. The instant voltages of the 3-phase controlled voltage source can be written as. It can be seen that the inverter ac voltage is actually partially decided by the dc bus voltage, as shown by equations (19)-(21).
[math]\displaystyle{}E_a=m\cdot{}u_{dc}\angle{\left(\theta{}(t)\right)}[/math] | (19) |
[math]\displaystyle{}E_b=m\cdot{}u_{dc}\angle{\left(\theta{}(t)-\frac{2\pi{}}{3}\right)}[/math] | (20) |
[math]\displaystyle{}E_c=m\cdot{}u_{dc}\angle{\left(\theta{}(t)+\frac{2\pi{}}{3}\right)}[/math] | (21) |
At the DC side, the inverter can be seen as a controlled current source, if the power loss in the inverter is neglected, the instant power flow at the DC side and AC side should be equal, so equations (22) and (23) could be obtained:
[math]\displaystyle{}P_{insDC}=P_{insAC}[/math] | (22) |
[math]\displaystyle{}V_{dc}i_{dc} = v_{a}i_{a}+v_{b}i_{b}+v_{c}i_{c}[/math] | (23) |
So [math]i_{dc}[/math] could be obtained:
[math]\displaystyle{}i_{dc} = \frac{v_{a}i_{a}+v_{b}i_{b}+v_{c}i_{c}}{V_{dc}}[/math] | (24) |
The differential equation of the dc side circuit can be described as:
[math]\displaystyle{}C\frac{dV_{dc}}{dt}=I_{PV}-I_{DC}[/math] | (25) |
Controller Modelling
To model the dc bus of PV inverter, the controller also needs to be appropriately modified. Specifically, the voltage controller should be modified to mitigate the impact of dc bus voltage, and the overload mitigation controller should be modified to prevent the dc bus voltage from collapsing. The modified PV grid-forming controller is shown in Figure 18, with Figure 18(a) representing the modified Q-V droop control and Figure 18(b) representing the modified P-f droop control.
GridLAB-D Example Model
Example GridLAB-D model for a PV-DC bus grid forming inverter
object inverter_dyn { flags DELTAMODE; name PVDC_GFM_Inverter; parent grid_form_PV_connect; control_mode GRID_FORMING; grid_forming_mode PV_DC_BUS; rated_DC_Voltage 850 V; rated_power 100 kW; // full rated power (not per-phase) frequency_convergence_criterion 1e-9; //Deltamode Convergence criterion (rad/s) voltage_convergence_criterion 1e-3; //Deltamode Convergence criterion (V) Pref 1.0 kW; //Real power reference for initialization Qref 200 W; //Reactive power reference for initialization E_max 1.2; //Maximum internal voltage output Rfilter 0.005; //Real portion of inverter filter (pu) Xfilter 0.05; //Reactive portion of inverter filter (pu) mp 3.77; //P-f droop in rad/s/pu - 3.77 represents 1% droop mq 0.05; //Q-V droop gain - 0.05 represents 5% droop C_pu 0.1; //Capacitor on DC bus - e.g., 100mf kpVdc 35; //DC voltage controller proportional gain kiVdc 350; //DC voltage controller integral gain } //PV-DC bus solar object object solar { name PV_Bus_DC_Solar; parent PVDC_GFM_Inverter; flags DELTAMODE; panel_type SINGLE_CRYSTAL_SILICON; SOLAR_POWER_MODEL PV_CURVE; rated_power 100 kW; //Ideally larger than U_oc * I_sc, though simulation/ //calculation are not impacted by this setting //Parameters for 100 kW array (update for others) pvc_U_oc_V 1155; //Open-circuit voltage pvc_I_sc_A 90; //short-circuit current pvc_U_m_V 850; //Thermal? voltage of the PV panel pvc_I_m_A 70.59; //Thermal? current of the PV panel //Solar panel configuration - standard and player driven (GLM-driven) SOLAR_POWER_MODEL FLATPLATE; SOLAR_TILT_MODEL PLAYERVALUE; ambient_temperature 77 degF; Insolation 92.9031 W/ft^2; }
References
- ↑ W. Du, R. H. Lasseter, and A. S. Khalsa, "Survivability of Autonomous Microgrid during Overload Events," IEEE Transactions on Smart Grid, pp. 1-1, 2018.